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Cadence, Samsung Foundry deepen 2nm, 3D-IC collaboration for AI chip design platform
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Cadence, Samsung Foundry deepen 2nm, 3D-IC collaboration for AI chip design platform
  • Cadence entered a multi-year agreement with Samsung Foundry to expand IP and certify AI-optimized design flows on Samsung’s second-generation 2nm node.
  • Collaboration targets signoff-ready digital, custom, 3D-IC design, system analysis for AI infrastructure, edge, intelligent-device chips.
  • Scope includes broader memory, interface IP portfolios, NVIDIA NVLink-C2C-enabled interconnect, GPU-accelerated EDA libraries for advanced-node implementations.
  • Samsung’s 3D Cube-H hybrid copper bonding support added to enable full planning, implementation, signoff for 3D-IC system designs.


Disclaimer: This news brief was created by Public Technologies (PUBT) using generative artificial intelligence. While PUBT strives to provide accurate and timely information, this AI-generated content is for informational purposes only and should not be interpreted as financial, investment, or legal advice. Cadence Design Systems Inc. published the original content used to generate this news brief via Business Wire (Ref. ID: 202605281300BIZWIRE_USPR_____20260528_BW147066) on May 28, 2026, and is solely responsible for the information contained therein.

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