Samsung Electronics unveiled its V10 Bonding V-NAND, or BV-NAND prototype product, at the Future Storage and Memory Conference held in Santa Clara, California, USA. The chip has over 400 layers and uses a new wafer bonding architecture to increase storage density and enhance performance. Samsung said its BV-NAND technology increases storage density by about 58% compared to the previous generation V9 NAND, while improving read, write, and input/output performance to meet the growing demand for higher capacity and more energy efficient storage solutions in artificial intelligence systems. Samsung also showcased what it called the industry's first ZHBM and Znand-O architecture concept models. The technology stores more data in a smaller space by stacking storage units vertically. Unlike traditional HBM and AI processors are packaged in parallel, Samsung's ZhBM will stack the storage vertically on top of the AI accelerator to shorten the data transmission distance, increase bandwidth, and improve energy efficiency. Samsung said its wafer bonding technology is expected to achieve 10 times higher storage density than traditional HBM5 memory, while increasing energy efficiency by 3 times and reducing thermal resistance by more than half.

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