• Credo partnered with AMD to build a working emulation platform for OmniConnect Weaver memory disaggregation on AMD Versal AI Edge Series Gen 2.
• Collaboration targets AI inference bottlenecks by enabling terabytes-class LPDDR memory capacity and higher bandwidth for programmable-logic accelerators.
• Design uses VSR links on standard organic packaging, avoiding a silicon interposer typically associated with custom ASIC-class memory scaling.
• System keeps expanded memory transparent above the controller, allowing application software to run unmodified.
• Demo slated for the 2026 OCP Global Summit in San Jose on an AMD Versal AI Edge Series Gen 2 evaluation board.

Disclaimer: This news brief was created by Public Technologies (PUBT) using generative artificial intelligence. While PUBT strives to provide accurate and timely information, this AI-generated content is for informational purposes only and should not be interpreted as financial, investment, or legal advice. Credo Technology Group Holding Ltd. published the original content used to generate this news brief via Business Wire (Ref. ID: 20261013236839) on October 13, 2026, and is solely responsible for the information contained therein.