The Zhitong Finance App learned that South Korean AI chip startup DeepX plans to invest more than 100 million US dollars to develop the next generation of AI chips using Samsung Electronics' 2 nm process. The company said it has completed the design of the DX-M2, and the final solution has been delivered to Samsung's foundry department. The first batch of silicon wafers is expected to arrive before March 2027, then enter customer evaluation, and mass production in 2028. This $100 million includes performance verification and production engineering costs — not the money for a single film, but rather an investment in the entire process of pushing a chip from design to a production-ready state.
5 watts run 10 billion parameters
The DX-M2 falls outside of data centers: robots, industrial equipment, personal computers with AI capabilities. The chip design goal is to run the generative AI model with approximately 5 watts of power consumption. According to South Korean media reports, the chip uses Samsung's second-generation 2-nanometer SF2P. The mask flow sheet was completed in early November, evaluation samples were delivered to customers in the second quarter of 2027, initial mass production and shipment in the fourth quarter of 2027, and full launch in 2028.
According to reports, the DX-M2 memory bandwidth has been increased from 50 Gb/s in the previous generation to 150 Gb/s, the NPU computing power is 80 TOPS, can run 20 billion to 100 billion parameter models (actually activate 3 billion to 20 billion), and the generation speed is 10 to 30 tokens/second. What has received more attention is the LPDDR5X-PIM solution in cooperation with Samsung's memory department: moving matrix-vector multiplication into the memory chip for execution, which bypasses the bottleneck of moving data back and forth. According to DeepX, according to Llama 3.1-8B, the token generation speed increased by up to 6.7 times, at the cost of increasing the power consumption to 2.7 times; if the power consumption is reduced to the original level, there is still a 2x gain. However, the prototype compiler currently only works in a simulation environment, and a version adapted to real hardware is still under development.
Previous generation account: 88 orders, $13.3 million
The motivation to bet comes from DX-M1. The chip, which was put into production at Samsung's 5nm in August 2025, has won 88 purchase orders and approximately US$13.3 million as of October 2026, covering 10 countries. Customers include Hyundai Motor Group Robotics Laboratory (used to distribute the robot DAL-e and mobile platform MoBed), Baidu (initial order of about 40,000 units for OCR cameras and data analysis systems), Lenovo, Advantech, and AAEON. The company's guidance for 2026 revenue is $40 million, which is more than double the original target of $17 million last year.
CEO Jin Luyuan defined the company as a “physical AI infrastructure company” rather than an AI chip design company. This determined its route: not to replace Nvidia in the data center, but to remove the “data transmission back to the cloud” from the device. The reasons given in the original article are energy consumption, costs, and delays. In addition, industrial customers also have boundary requirements where data does not leave the factory area. However, the end side does not replace the cloud — training, large-scale simulation, and cross-factory aggregation are still in the data center, and the end side is only responsible for the high frequency, low latency, and must be completed on the spot.
Samsung 2nm also needs a military training customer
Another of this $100 million is Samsung. Samsung's SF2 yield increased from about 20% in the second half of 2025 to nearly 60% at the end of September 2026. SF2P for Exynos is said to have passed the 70% threshold in January 2026. The order list is very luxurious: Tesla AI5/AI6 (signed in July 2025, approximately US$16.5 billion until 2033), Broadcom, Arm, and Nvidia's inference chips are also on the list. However, none of them have completed mass production verification on Samsung 2nm; only Samsung's own chips have actually gone through the whole process.
For Samsung, the value of a customer like DeepX is not the order amount, but rather the fact that someone actually made the product using its new process. The price of the 2 nm wafer is about 20,000 US dollars, which is about one-third cheaper than TSMC. The price is Samsung's main weapon to grab orders; in turn, DeepX received not only production capacity, but priority to jointly debug PIM with Samsung's memory department — this cooperation has taken a year and a half.
The real threshold is not at TOPS
The 80 TOPS of DX-M2 is not far behind on paper. However, the victory or loss of edge chips is rarely determined by TOPS: Nvidia accounts for about 39% of edge AI computing revenue; Jetson Ecosystem claims 2 million developers; expert rivals Hailo, Axelera, SiMa.ai, Endurance, and EdgeCortix each maintain a power consumption band; Qualcomm Dragonwing, Cloud AI 100 Ultra, and MediaTek Genio Pro have filled the 50 TOPS range or more. What determines whether a customer migrates is compiler coverage and migration costs.
DeepX's response was to connect the DX-M1 to Intel OpenVino, making it an optional inference device in the developer drop-down menu, rather than installing a separate SDK; the engagement with AMD is still limited to directional discussions. The risk is also clear: it will take $100 million to get the first batch of silicon until 2027, initial shipments in the fourth quarter of 2027, and rival end side NPUs were already in a good position in the same power consumption segment when fully mass-produced in 2028. Coupled with the cash flow pressure of 2.01 billion won operating losses in 2025, whether the ongoing D round (Samsung Securities and SVIC 33 already subscribed for $12.3 million in new shares in October) can support large-scale shipments is the most realistic constraint on this route.